The Systems The Performance Characteristics

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02 Nov 2017

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Another name for CPU is Microprocessor. For the CPU have so many history’s. Some people say that CPU is the brains of our personal computer. The CPU going to take more than one article to dig into the inner secrets of microprocessors. The transistors are tiny, nearly microscopic bits of materiel that will block electricity when the electricity is only a weak charge, but will allow the electricity pass through when the electricity is strong enough. The transistors within the CPU transition from being a non conductor to a conductor when the electrical charge is strong enough.

The first single chip microprocessor in world is Intel 4004. The Intel introduced on November 15, year 1972. The clock rate is 740 kHz. In 1974 Bally investigated using the Intel 4004, the first industrial microprocessor, for its pinball machines. In 1971 the microprocessor is a small little fingernail, delivered the same computing power as the first electronic computer, which filled an entire room. The early manufacturing was produced on two inch wafers compared to the 12 inch wafers that use for today’s product. In 2010, the Intel processor with a 32nm processing dies and second generation high k metal. The Intel 4004 microprocessor circuit line width was 10 microns, or 10,000 nanometers.

K.John (2010)

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The second microprocessor is Intel 8008. Intel 8008 is introduced on April 1, year 1972. The clock rate is 500 kHz and also 0.05 MIPS. The first 8 bits CPU, Intel 8008 was released 5 months after Intel 4004. The 8008 is very speed grades 500 KHz. The numbers assume that the CPU uses fast memory. Intel 8008 is number of Transistors 3.500 at 10um. Typical in early its 8 bit microcomputer, dumb terminal, and general calculators. The original intended for use in the data point 2200 microcomputer.

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Kean Bean (2000)

The third is Intel 8048. Intel 8048 is a type of microcontroller. In 8048 in this include 40 pin plastic DIP. Microprocessor 8048 was designed for low cost and small size. The Intel 8048 has a modified Harvard architecture, with program ROM on chip and 64 to 256 bytes. The Intel 8048 processor was replaced by the very popular but bizarre Intel8051 and Intel 8052. The Intel 8048 it is a minimum and maximum operating temperature is 0 C to 70 C. the maximum power dissipation is 0.33 Watt and 0.74 Watt.

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Next is iAPX 432. This processor introduced on January 1, year 1981 as Intel first 32 bits microprocessor. The multi chip in CPU is the Intel first 32 bit microprocessor. It is one terabyte virtual address space. For iAPX 432 hardware support for the fault tolerance. The clock rate is

C.Bartee.T (1991)

5MHz, 7MHz and also 8MHz. A single function, rather than an entire microkernel, could protect

itself for the rest of the system. It could be implemented within a single chip today, and would run at a reasonable speed.

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Haris.D (2012)

The fifth is Pentium 4. Pentium 4 introduced on November 20, year 2000. It is cache 256 KB advanced transfer cache. The system bus clock rate is 400 MHz and the number of transistors is 42 million. The Pentium 4 used in desktop and entry level workstations. The overall CPU performance is proportional to its frequency and its efficiency to achieve better performance levels many micro architectures, including P6, balance between faster CPU and improved efficiency. First Pentium 4 microprocessors, based on Willamette and Northwood cores, as well as some Prescott processors, were referenced by their speed.

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The last processor is mobile Pentium 4-m. The mobile Pentium is 400 MHz FSB and also 1.2 until 2.6 GHz speed. It is can be 55 Million transistors. The mobile processors have lower power dissipation than the desktop processors due to lower core voltage and additional power saving features. The mobile Pentium power savings in this mode are minor for 1.4 GHz processors, but they increase significantly with the increase of the processor speed. The Pentium 4 Ms fit into the same socket 478 as desktop Pentium 4 CPUs, though Intel does not recommend using the Pentium 4 M processors in desktop systems.

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Shelly. G (2010)

CONCLUSION 1

The conclusion of CPU history is the design of CPU has changed considerably in the quarter century since the advent of the first modern. The computer CPU is responsible for handling all instruction it receives from hardware components and software programs running on the computer. Until now all the processer sold will run natively in 64 bit modes. If you want to buy a processer then I strongly suggest that you buy a 64 bits modules as this the best future proof your system against the latest developments in both software and hardware design.

INTRODUCTION 2

The second question is about bus the main topic. Bus is a type of network setup where each computer and network device is connected to a single cable or backbone. He bus network is uses a transmission medium, all node is share in a common bus. A bus network is allows only one device to transmit one time. The data frames contain source and destination addresses, where the each monitors the bus and copies the addressed to it.

The terminator is required at each to absorb the signal so as it does not reflect back across the bus. The bus topology is not responsible for moving the signal along. The bus topology is does not affect others. It is allows relatively high rate of data transmit ion. Bus can be easy to implement and extend. The bad thing in bus it is does not cope well with heavy traffic rates. They require network to detect when two notes are transmitting at the same time.

In conjunction with the bus width, many computer professional refer to a computer word size. That is, a 64 bit processor can manipulate 64 bits at a time. In most computers, the word size is the same as the bus width. The higher bus clock speed, the faster the transmission of data, which result in programs running faster.

Mahmood.Z(2011)

ANSWER OF QUESTION 2

The buses are set of wires that can carry special information to or from the CPU. Each of the line or wire of a bus can at any one time contain a single binary digit. A computer system many contain a number of different buses. In bus systems have many type of buses. There are interconnection, transmission, architecture, control lines, address lines and data lines.

The component of a computer system, that is, the memories, input output devices, and also other elements it is must be interconnected. They each other profoundly affects the systems the performance characteristics. The arithmetic logic unit and control unit are generally placed together and they called central processing unit (CPU). The some computer processors is divided into two distinct parts, the AU and the LU. It is performs the AU arithmetic operation and LU performs the logical operations. The systems operation, directing the operation of the other parts of the systems. To make the interconnection of the system components less expensive and the interface logic used, a very popular technique is to interconnect all the components. In the system the CPU is the director of all traffic on the bus.

In memory is a module consists of N word of equal length. The word of data can be read from or written into the memory. The internal point of view, input output is a functionally similar to the memory. We can refer the interfaces to external devices as a port and it is a unique address. The processor read in instruction and data writes out data after processing, and use control signals to control the overall operation of the system. By far the most common is the bus and various multiple bus structures.

The bus system consists typically, of from 50 to hundreds of separate lines. Each of the lines is assigned a particular meaning or function. There are so many different type of bus designs, on any bus the lines can be classified into three functional group data, address, and control lines.

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Control line is used to designate he source or destination of the data on the data bus. The bus allows to communication between components over one data channel and is characterized by how much information it can transmit at once. The data is expressed in bits and corresponds the amount of number of physical lines over the information is sent. For example is a ribbon cable. With is 32 wires can send 32 bits in parallel. The control signals transmit both command and timing information between system modules. The next is address line are use for designate the

L. Hennessy (2011)

source or destination of the data on the data bus. The address lines are generally also used to address input output ports. Actually amount of memory that can be accessed is usually much less than this theoretical limit due to chipset and motherboard limitations. The data lines are provide a path for moving data between system modules. The lines we called are the data bus. Because each line can carry only 1 bit at a time, the number of lines determines how many bits can be transferred at a time. Mostly the processors have internal buses that can carry information back and forth between the processor and memory. For example is data lines is 8 bits and each instruction is 16 bits long, the processer must access the memory module twice during each instruction cycle.

The traditional bus architecture is reasonably efficient but begins to break down as higher and higher performance is seen in the output input devices. Again, there is a local bus that connects the processer to a cache controller, which is in turn connected to a system bus that supports main memory. The high speed bus brings high demand devices into a closer integration with the processor and also the same time is independent of the processor.

Ken Bean (2000)

System Bus

Cache/bridge

Main memory

Processor Local bus

LAN

Video

Graphic

SCSI

Fire Wire

High speed bus

Expansion bus interface

Serial

FAX

Modem

Expansion bus

High performance architecture

In synchronous timing the occurrence of events on the bus events on the bus is determined by a clock. The bus includes a clock line which a clock transmits a regular sequence of alternating. All the devices on the bus can read the clock line and all events start the beginning of a clock cycle. When read operation, the processor issues a read command at the start of the second cycle.

For the asynchronous timing, the occurrence of one event on a bus follows and depends on the occurrence of events. Once the line data have stabilized, the memory module asserts the acknowledged line to signal the processor that the data are available.

Haris.D (2012)

CONCLUSION 2

Conclusion of second question is a large of different pc bus systems found in today pc. They each other profoundly affects the systems the performance characteristics. The arithmetic logic unit and control unit are generally placed together and they called central processing unit (CPU). Improvements in overall computer performance, it is including microprocessors, graphic cards. Demand the users for higher performance machines due to advances in operating system and interface.



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