The Motivation Behind This Work

Published Date: 02 Nov 2017

Chapter 2. Non-Binary Computer Arithmetic

Our main aim in this chapter is to introduce the basic concepts underlying residue number systems (RNS), arithmetic, and applications and to give a brief but almost complete summary. We shall; however, start with a discussion of certain aspects of more commonly used number systems and then review the main number systems used in conventional computer arithmetic. We shall also briefly discuss one other unconventional number system that has found some practical use in computer arithmetic; this is the redundant [1] signed-digit number system. We have two objectives in these preliminary discussions. The first is to facilitate a contrast between RNS and commonly used number systems. The second is to recall a few basic properties of the conventional number systems, as; ultimately, it is these that form the basis of implementations of residue arithmetic. The subsequent introduction to RNS consists of some basic definitions, a discussion of certain desirable features of a residue number system, and a discussion of the basic arithmetic operations.

A basic number system consists of a correspondence between sequences of digits and numbers. In a fixed-point number system, each sequence corresponds to exactly one number [2] , and the radix-point the "decimal point" in the ordinary decimal number system -that is used to separate the integral and fractional parts of a representation is in a fixed position. In contrast, in a floating-point number system, a given sequence may correspond to several numbers: the position of the radix-point is not fixed, and each position in a digit-sequence indicates the particular number represented. Usually, floating-point systems are used for the representation of real numbers, and ¯xed-point systems are used to represent integers (in which the radix point is implicitly assumed to be at the right-hand end) or as parts of floating-Point representations; but there are a few exceptions to this general rule. Almost all applications of RNS are as fixed-point number systems.

2.1. Conventional number systems

In this section we shall review the three standard notations used for fixed-point computer arithmetic and then later point out certain relationships with residue arithmetic.

In general, numbers may be signed, and for binary digital arithmetic there are three standard notations that have been traditionally used for the binary representation of signed numbers. These are sign-and-magnitude, one's complement, and two's complement. Of these three, the last is the most popular, because of the relative ease and speed with which the basic arithmetic operations can be implemented. Sign-and-magnitude notation has the convenience of having a sign-representation that is similar to that used in ordinary decimal arithmetic. And one's complement, although a notation in its own right, more often appears only as an intermediate step in arithmetic involving the other two notations.

The sign-and-magnitude notation is derived from the conventional written notation of representing a negative number by prepending a sign to a magnitude that represents a positive number. For binary computer hard-ware, a single bit suffices for the sign: a sign bit of 0 indicates a positive number, and a sign bit of 1 indicates a negative number. For example, the representation of the number positive five in six bits is 000101, and the corresponding representation of negative five is 100101. Note that the representation of the sign is independent of that of the magnitude and takes up exactly one bit; this is not the case both with one's complement and two's complement notations.

2.2. Redundant signed-digit number systems

Many Many unconventional number systems have been proposed, and some even have been put to practical use. Nevertheless, very few have had widespread or sustained application. Therefore, other than RNS, we shall restrict ourselves here to just the redundant signed-digit (RSD) systems, which have long been used for high-speed arithmetic. As far as practical unconventional notations go, RSD systems are the only serious competitor to RNS.RSD systems may also have some applications in the implementation of residue arithmetic, just as the conventional notations do; this is a largely unexplored area, although there has been some relevant work.

Two of the conventional systems discussed above have some redundancy, which means that in each there is at least one number with two or more representations; but the redundancy there is hardly of a useful variety. In contrast, redundant signed-digit number systems have much greater degrees of deliberate and useful redundancy. These systems are mainly used for high-speed arithmetic, especially in multiplication (in which they are used indirectly) and division (in which they are used more directly). They are also used in some algorithms for the evaluation of elementary (i.e. transcendental) functions.

2.3. Residue number systems

An RNS is defined by a set of relatively prime integers called the moduli. The moduli-set is denoted as {m1, m2, .…mn } where ‘mi ’ is the ith modulus. Each integer X can be represented as a set of smaller integers called the residues. The residue-set is denoted as {r1 ,r2 , …, rn} where ‘ri’ is the ith residue. The residue ‘ri’ is defined as the least positive remainder when X is divided by the modulus mi . This relation can be notationally written based on the congruence:

X mod mi = ri ………………….. (2.1)

The same congruence can be written in an alternative notation as:

│X│mi = ri ………………….. (2.2)

The two notations will be used interchangeably throughout this thesis.

The RNS is capable of uniquely representing all integers X that lie in its dynamic range. The dynamic range is determined by the moduli-set {m1, m2 , .…mn } and denoted as M where:

M = ………………….. (2.3)

The RNS provides unique representation for all integers in the range between 0 and M-1. If the integer X is greater than M-1, the RNS representation repeats itself. Therefore, more than one integer might have the same residue representation.

It is important to emphasize that the moduli have to be relatively prime to be able to exploit the full dynamic range M.

Consider two different residue number systems defined by the two moduli-sets {2, 3, 5} and { 2, 3 , 4 }. The representation of the numbers in residue format is shown in Table 1.1. for the two systems

Table1.1. RNS representation for two different module set

x

(2,3,5)

(2,3,4)

2

3

5

2

3

4

0

0

0

0

0

0

0

1

1

1

1

1

1

1

2

0

2

2

0

2

2

3

1

0

3

1

0

3

4

0

1

4

0

1

0

5

1

2

0

0

0

1

6

0

0

1

1

1

2

7

1

1

2

0

2

3

8

0

2

3

1

0

0

9

1

0

4

0

1

1

10

0

1

0

0

0

2

11

1

2

1

1

1

3

12

0

0

2

0

2

0

13

1

1

3

1

0

1

14

0

2

4

0

1

2

15

1

0

0

0

0

3

16

0

1

1

1

1

0

17

1

2

2

0

2

1

18

0

0

3

1

0

2

19

1

1

4

0

1

3

20

0

2

0

0

0

0

21

1

0

1

1

1

1

22

0

1

2

0

2

2

23

1

2

3

1

0

3

24

0

0

4

0

1

0

25

1

1

0

0

0

1

26

0

2

1

1

1

2

27

1

0

2

0

2

3

28

0

1

3

1

0

0

29

1

2

4

0

1

1

30

0

0

0

0

0

2

In the first RNS, the moduli in the moduli-set {2, 3,5} are relatively prime. The RNS representation is unique for all numbers in the range from 0 to 29. Beyond that range, the RNS representation repeats itself. For example, the RNS representation of 30 is the same as that of 0. In the second RNS, the moduli in the moduli-set {2, 3, 4} are not relatively prime, since 2 and 4 have a common divisor of 2. We notice that the RNS representation repeats itself at 12 preventing the dynamic range from being fully exploited. Therefore, choosing relatively prime moduli for the RNS is necessary to ensure unique representation within the dynamic range.

In the preceding discussion on RNS, we assumed dealing with unsigned numbers. However, some applications require representing negative numbers. To achieve that, we can partition the full range [0: M-1] into two approximately equal halves: the upper half represents the positive numbers, and the lower half represents the negative numbers. The numbers X that can be represented using the new convention have to satisfy the following relations:

……………… (2.4)

……………….. (2.5)

If X={r1, r2, …, rn} represents a positive number in the appropriate range, then –X can be represented as where is the mi’s complement of ri , i.e. satisfies the relation . In our discussion, we will assume that the numbers are unsigned unless otherwise it is mentioned.

2.2 Mathematical Fundamentals

In this section, we introduce the fundamentals of the RNS representation. The congruence’s are explained in details with their properties. These properties form a solid background to understand the process of conversion between the conventional system and the RNS. More advanced results and mathematical relations can be found in the subsequent chapters. Basic algebra related to RNS is introduced here. This includes finding the additive and the multiplicative inverses, and some properties of division and scaling which are not easy operations in RNS.

2.2.1 Basic Definitions and Congruence’s

Residue of a number

The basic relationship between numbers in conventional representation and RNS representation is the following congruence:

X mod mi = ri ……………… (2.6)

Where mi is the modulus, and ri is the residue. The residue is defined as the least positive remainder when the number X is divided by the modulus mi .

2.2.2 Basic Algebraic Operations

Addition (or subtraction)

We can add (or subtract) different numbers in the RNS representation by individually adding (or subtracting) the residues with respect to the corresponding moduli. Consider the moduli-set S = {m1, m2, .…mn } and the numbers X and Y are given in RNS representation:

X = {x1 ,x2, ……..,xn} and Y= {y1, y2, …….., yn}

Then,

Z = X + Y = {z1, z2, ……….,zn}

Where zi= (xi + yi) mod mi

This property can be applied to subtraction also, where subtraction is considered as the addition of . The modulo operation is distributive over addition (and subtraction):

Multiplication

In a similar way to addition, multiplication in RNS can be carried out by multiplying the individual residues with respect to the corresponding moduli. Consider the moduli-set S = {m1, m2, .…mn } and the numbers and are given in RNS representation:

X = {x1 ,x2, ……..,xn} and Y= {y1, y2, …….., yn}

Then,

Z = X Y = {z1, z2, ……….,zn}

Where zi= (xi yi) mod mi

The modulo operation is distributive over multiplication:

Division

Division is one of the main obstacles that discourage the use of RNS. In RNS representation, division is not a simple operation. The analogy between division in conventional representation and RNS representation does not hold.

In conventional representation, we represent division as follows:

Which can be rewritten as:

In RNS, the analogous congruence is:

Multiplying both sides by the multiplicative inverse of Y, we can write:

q = x y-1 mod m

In above Equation, q is equivalent to the quotient obtained from x/y only if it has an integer value. Otherwise, multiplying by the multiplicative inverse in RNS representation will not be equivalent to division in conventional representation.

2.3. Conversion between Binary Representation and RNS Representation

To utilize the properties of the RNS and carry out the processing in the residue domain, we need to be able to convert smoothly between the conventional (binary or analog) representation and the RNS representation. The process of conversion from conventional representation to RNS representation is called Forward Conversion. Conceptually, this process can be done by dividing the given conventional number by all the moduli and finding the remainders of the divisions. This is the most direct way that can be applied to any general moduli-set. However, we show in Chapter 2 that for some special moduli-sets this process can be further simplified. The simplification arises from the fact that division by a number, that is a power of two, is equivalent to shifting the digits to the right. This property can be utilized to expedite and simplify the forward conversion. The process of conversion from RNS representation to conventional representation is called Reverse Conversion. The reverse conversion process is more difficult and introduces more overhead in terms of speed and complexity. The algorithms of reverse conversion are based on Chinese Remainder Theorem (CRT) or Mixed-Radix Conversion (MRC). The use of the CRT allows parallelism in the conversion process implementation. The MRC is an inherently sequential approach. In general, the realization of a VLSI implementation of a reverse converter is complex and costly. More details about CRT and MRC are given in Chapter 3.

2.4. Advantages of RNS Representation

Implementing an algorithm using parallel distributed arithmetic with no dependence between the arithmetic blocks simplifies the overall design and reduces the complexity of the individual building blocks. The advantages of RNS representation can be summarized as follows: High Speed: The absence of carry propagation between the arithmetic blocks results in high speed processing. In conventional digital processors, the critical path is associated with the propagation of the carry signal to the last bit (MSB) of the arithmetic unit. Using RNS representation, large words are encoded into small words, which results in critical path minimization.

Reduced Power: Using small arithmetic units in realizing the RNS processor reduces the switching activities in each channel . This results in reduction in the dynamic power, since the dynamic power is directly proportional to switching activities.

Reduced Complexity: Because the RNS representation encodes large numbers into small residues, the complexity of the arithmetic units in each modulo channel is reduced. This facilitates and simplifies the overall design.

Error Detection and Correction: The RNS is a non-positional system with no dependence between its channels. Thus, an error in one channel does not propagate to other channels. Therefore, isolation of the faulty residues allows fault tolerance and facilitates error detection and correction. In fact, the RNS has some embedded error detection and correction.

2.5. Drawbacks of RNS Representation

We mentioned that RNS architectures result in great advantages, especially in terms of speed and power. This makes it very suitable to implement RNS in different applications. However, in spite of their great advantages, RNS processors did not find wide use but remained as an interesting theoretical topic. There are two main reasons behind the limited use of RNS in applications:

First, although the RNS representation simplifies and expedites addition and multiplication compared to the conventional binary system, other operations such as division, square-root, sign detection, and comparison are difficult and costly operations in the residue domain. Thus, building an RNS based ALU that is capable of performing the basic arithmetic is not an easy job.

Second, conversion circuitry can be complex and can introduce latency that offsets the speed gained by the RNS processor. Hence, the design of efficient conversion circuits is considered the bottleneck of a successful RNS.

Nevertheless, RNS architectures are considered an interesting theoretical topic for researchers. Some applications that are computationally intensive and require mainly recursive addition and multiplication operations, such as FFT, FIR filters, and public-key cryptography are appealing to be implemented using RNS. Therefore, investigating new conversion schemes can lead to overcoming some obstacles in the RNS implementation of different applications by reducing the overhead of the conversion stages.

2.6. Applications

As discussed in the last section, RNS is suitable for applications in which addition and multiplication are the predominant arithmetic operations. Due to its carry-free property, RNS has good potential in applications where speed and/or power consumption is very critical. In addition, the isolation between the modulo channels facilitates error detection and correction. Examples of these applications are digital signal processing (DSP), digital image processing, RSA algorithms, communication receivers, and fault tolerance. In most of these applications, intensive multiply-and-accumulate (MAC) operations are required.

One possible application of RNS in DSP is the design of digital filters. Digital filters have different uses such as interpolation, decimation, equalization, noise reduction, and band splitting. There are two basic types of digital filers: Finite Impulse Response (FIR) filters and Infinite Impulse Response (IIR) filters. Carrying out the required multiplication and addition operations in the residue domain results in speeding up the system and reducing the power consumption. Another possible application of RNS in DSP is the Discrete Fourier Transform (DFT) which is a very common transform in various engineering applications. Again, the main operations involved here are addition and multiplication. Using RNS in implementing DFT algorithms results in faster operations due to the parallelism in the processing. In addition, the carry-free property of the RNS makes it potentially very useful in fault tolerant applications.

Nowadays, the integrated circuits are very dense, and full testing will no longer be possible. The RNS has no weight information. Therefore, any error in one of the residues does not affect the other modulo channels. Moreover, since ordering is not important in RNS representation, the faulty residues can be discarded and corrected separately. In summary, RNS seems to be good for many applications that are important in modern computing algorithms.

Chapter 3: Conversion between Binary and RNS Representations

In this chapter, we discuss the conversion between binary and RNS representations. To be able to process the data in RNS, the data has to be first converted to RNS representation. The process of converting the data from conventional representation (analog or binary) to RNS representation is called Forward Conversion. Meanwhile, we shall assume that the initial inputs are available in binary representation. We need to utilize efficient algorithms and schemes for the forward conversion process. The forward converter has to be efficient in terms of area, speed, and power. After the data is processed through the modulo processing units of the RNS, they have to be converted back into the conventional representation. The process of converting the data from RNS representation to conventional representation is called Reverse Conversion. We present the basic theoretical foundations for the methods of reverse residue-to-binary (R/B) conversion. In addition, we present some architectures for the implementation of these methods. The overhead of the reverse conversion circuitry is the main impediment to build an efficient RNS processor. Particularly, the design of the reverse converter is more important and constitutes the bottleneck of any successful RNS.

3.1. Forward Conversion from Binary to RNS Representation

The forward conversion stage is of paramount importance as it is considered as an overhead in the overall RNS. Choosing the most appropriate scheme depends heavily on the used moduli-set. Forward converters are usually classified based on the used moduli into two categories. The first category includes forward converters based on arbitrary moduli-sets. These converters are usually built using look-up tables. The second category includes forward converters based on special moduli-sets. The use of special moduli-sets simplifies the forward conversion algorithms and architectures. The special moduli-set converters are usually realized using pure combinational logic.

We present here some of the available architectures for forward conversion from binary to RNS representation. First, we present forward converters based on arbitrary moduli-sets. Then, we present forward conversion based on the special moduli-set {2n-1, 2n, 2n+1). We show how the complexity of the overall design is minimized which reduces the overhead introduced by the forward converter. Finally, we provide some architectures for implementing the modulo addition that are used in the realization of all forward converters.

3.1.1. Arbitrary Moduli-Set Forward Converters

We present here some architectures for forward conversion from binary to RNS representation using any arbitrary moduli-set. We mentioned earlier that using special moduli- sets, such as {2n-1, 2n, 2n+1), makes the forward conversion process fast and simple. In general, forward converters based on special moduli-sets are the most efficient available converters. However, some applications require a very large dynamic range which cannot be achieved efficiently using the special moduli-sets. For example, most of the employed moduli-sets consist of three or four moduli. When the required dynamic range is very large, these moduli have to be large, which results in lower performance of the arithmetic units in each modulo channel. In that case, the best solution is to use many small moduli (five or more) to represent the large dynamic range efficiently.

The implementation of arbitrary moduli-set forward conversion algorithms is either based on look-up tables (typically ROMs), pure combinational logic, or a combination of both. Implementation of these converters using combinational logic is tedious and requires complex processing units. The all ROM implementation is preferred in this case. However, for a large dynamic range, the ROM size grows dramatically and makes the overall conversion process inefficient. A trade-off between the two implementations can be utilized using a combination of ROM and combinational logic.

we provide some basic architectures for arbitrary moduli-set forward converters. We aim at presenting the basic principle of each architecture. As the look-up table implementation is preferred in the case of the arbitrary moduli-set, we shall focus on this implementation approach and show different techniques to realize it.

The main idea in the look-up table implementation of forward converters is to store all the residues and recall them based on the value of the binary input. The binary input acts as an address decoder input that points at the appropriate value in the look-up table.

Serial Conversion

A direct implementation of Equation is to store all the values in a look-up table. The values are activated or deactivated (set to 0) based on whether Xj is 0 or 1, respectively. A modulo- m adder with an accumulator is required to obtain the modulo addition of all activated values in the table. A direct implementation of Equation is shown in Figure 2.1.

│X│m

Accumulator Registor

MU

X

Counter

n-1

Module M

Adder

Look – up

Table

-1

Fig 3.1. Serial Forword Conversion‘’0’"

Xj

Parallel Conversion

Another architecture for forward conversion from binary to RNS representation can be obtained by manipulating Equation . Suppose X is partitioned into K-k-blocks, each of p-bits. Let X be partitioned into the blocks Bk-1Bk-2………B1B0, then:

The above Equation can be directly implemented by storing the values in k look-up tables, where k is the number of partitioning blocks. The values of are used to address the values in the look-up table (LUT). These values are then added using a multi-operand modulo adder. A typical implementation of above Equation is shown in Figure below.

Fig 3.2. Parallel Forword ConversionB0

B1

Bk-1

LUT

Multi Operand Modulo m Adder

LUT

LUT

│X│m

3.1.2. Special Moduli-Set Forward Converters

Choosing a special moduli-set is the preferred choice to facilitate and expedite the conversion stages. The special moduli-set forward converters are the most efficient available converters in terms of speed, area, and power. Usually, the special moduli-sets are referred to as low-cost moduli-sets. In this section, we will focus on the special moduli-set {2n-1, 2n, 2n+1} as it is the most commonly used moduli-set.

In contrast to arbitrary moduli-set forward converters, the special moduli-set converters are usually implemented using pure combinational logic. To compute the residue of a number X (in binary representation) with respect to modulus m, we utilize the same principle of above Equation , i.e. evaluate the values│2j│m . The only difference here is that m is restricted to 2n-1, 2n and 2n+1. We shall derive simple formulas that facilitate the algorithm used to obtain the residues. We show how the residues with respect to the special moduli can be obtained with reduced complexity algorithms and architectures.

A typical architecture for the implementation of a forward converter from binary to RNS representation for the special moduli-set {2n-1, 2n, 2n+1} is shown in Figure.

Fig 3.3. {2n-1, 2n, 2n+1} Forward Conver

3.1.3. Modulo Addition

Fig 3.4. Modulo-m adderIn Sections 3.1 and 3.2, we presented some available architecture for the implementation of forward converters from binary to RNS representation. All these architectures, whether they are based on arbitrary moduli or special moduli, require modulo addition in the conversion process. The modulo adder is one of the basic arithmetic units in RNS operations and converters. The performance of the modulo adder is very critical in the design of forward converters from binary to RNS representation. In this section, we provide a brief introduction to the modulo addition operation. We focus on the high-level design of modulo adders. However, the design of the underlying adder is very important in determining the overall performance of the modulo adder. The underlying adder is a conventional binary adder that can have different forms such as ripple-carry adder (RCA), carry-save adder (CSA), carry-lookahead adder (CLA), parallel prefix adder, and so on. Here, we restrict ourselves to the basic architectures.

3.2 Reverse Conversion from RNS to Binary Representation

Reverse conversion algorithms in the literature are all based on either Chinese Remainder Theorem (CRT) or Mixed-Radix Conversion (MRC). The MRC is an inherently sequential approach. On the other hand, the CRT can be implemented in parallel. The main drawback of the CRT based R/B reverse converter, is the need of a large modulo adder in the last stage. All the converters proposed in the literature have this problem. The reverse conversion is one of the most difficult RNS operations and has been a major, if not the major, limiting factor to a wider use of RNS. In general, the realization of a VLSI implementation of R/B converters is still complex and costly. Here, we derive the mathematical foundations of the CRT and the MRC, and then we present possible implementations of these methods in reverse conversion.

3.2.1 Chinese Remainder Theorem

The statement of the Chinese Remainder Theorem (CRT) is as follow:

Given a set of pair-wise relatively prime moduli {m1, m2,…., mn} and a residue representation {r1, r2,…., rn}in that system of some number X , i.e. ri = │X│m , that number and its residues are related by the equation:

where is the product of the mi’s, and Mi=M/mi . If the values involved are constrained so that the final value of X is within the dynamic range, then the modular reduction on the left-hand side can be omitted.

To understand the formulation of Equation, we rewrite X as:

Hence, the reverse conversion process requires finding Xi ‘s. The operation of obtaining each Xi is a reverse conversion process by itself. However, it is much easier than obtaining X.

Consider now that we want to obtain Xi from{0,0,…., ri ,….,0,0}. Since the residues of Xi are zeros except for ri . This dictates that is a multiple mj of where . Therefore, Xi can be expressed as:

where is found such that =1

We notice from above Equation that implementing the CRT requires three main steps:

 Obtaining Mi’s and their inverses Mi ’s.

ï‚· Multiply-and-Accumulate operations

ï‚· Modular reduction

The modulo adder can be realized using ROMs, pure combinational logic, or a combination of both. When the dynamic range is large, the speed and the complexity of the multi-operand modulo adder becomes the bottleneck of the design of the R/B converter. Most of the available CRT based R/B converters have the general high-level block diagram shown in Figure

Fig 3.5 RNS to binary conversion

Chapter 4: Adder Structure

Adders are used in many aspects. It is generally recognized that most of the time required by adders is due to carry propagation, so how to reduce the propagation time is the focus on today’s techniques. Different binary adder schemes have their own characters, such as area and energy dissipation. No such adder scheme is the best for every condition, so to choose in a specific context with specific requirement and constraint is important. Because this thesis work does not focus on analysis of delay time of different adders but the delay can make lots of difference in many applications basically in digital processing application, here the function of some commonly used adders is given.

4.1. Two’s Complement Representation

Two’s complement representation uses the most significant bit as a sign bit, making it easy to test whether an integer is positive or negative. Range of two’s complement representation is from -2n-1 to 2n-1 -1. Consider an n bits integer A, in two’s complement representation. If A is positive, then the sign bit an-1 is zero. The remaining bits represent the magnitude of the number, in the same fashion as for sign magnitude:

The number zero is identified as positive and therefore has a 0 sign bit and a magnitude of all 0s, we can see that the range of positive integers that maybe represented is from 0 to 2n-1 −1. Any larger number would require more bits.

4.2. Fixed Time Type

Most commonly implemented is the fixed time type adder scheme. The character is that no signal is indicated when addition is completed. Therefore the worst case delay should be considered.

4.3. Variable Time Type

Contrary to fixed time type adder scheme, the variable time type adders have a completion signal so that the result of the addition can be used as soon as the completion signal is asserted.

4.4. Carry-Propagate Adder

Carry-propagate adders (CPA) can get the result in conventional number system, also called fixed-radix system. The property of fixed-radix system is that every number has a unique representation, so that no two sequences have the same numerical value. A digit set from 0 to r-1, where r means radix.

4.4.1. Ripple-Carry Adder