Comparison With Existing Architecture

Published Date: 02 Nov 2017

Cryptography is a method by which information is passed between two people in a secure way. It enables to send sensitive data over unsecure networks without intervention of unauthorized people. RSA algorithm is a cryptographic technique which uses public key. The security of this cryptosystem is based on the fact that it's very difficult to factorize large prime number. It is used for digital signature and key distribution.

In this project, Verilog HDL is used to implement a 64bit RSA block cipher system. The implementation includes three parts: key generation, encryption and decryption process. In the key generation stage, a public key and private key are generated and the private key will be distributed to receiver according to certain key distribution schemes. The cipher text can be decrypted at receiver to obtain the original message using private key.

Keywords: Montgomery multiplication, Modular Exponentiation, RSA Algorithm,

INTRODUCTION

Rivest Shamir Adleman (RSA) is a public key cryptographic system. In this message are transmitted between two parties securely based on a public key and private key and common data. The prime numbers are used in RSA algorithm, as we can generate any number using it. The numbers are used to generate public key and private key based on gcd method. Here we get public key e and private d. The public key is used by the transmitter to code the message signal to a cipher text and we generate a common data ‘n’ for both the transmitter and receiver using prime numbers. With this ‘n’ and private key d, the receiver decrypts the cipher text back to message.

Generally, it includes a third party who generates a pair of public key and to distribute keys to transmitter and receiver. Transmitter and receiver should both know the value of n. The transmitter knows the public key e, and only the receiver knows the private key d. A third party generates the public key,(e, n) and secret key (d, n) and these are distributed to transmitter and receiver separately.

encryption.jpg encryption - Copy.jpg

Fig 1(a) Transmitter Side Fig1(b) Receiver Side

KEY GENERATION

Prime Number Generation

The need for generating prime number is from the fact that, using prime numbers we can generate any other number. The method followed is to generate large numbers randomly and simultaneously check whether each of these number is prime. Hence choose two prime numbers.

A linear feedback shift register(LFSR) can be used to generate random numbers x and y. Theoretically, N-bit LFSR can be used to generate 2n-1 bit long random sequences. Choosing a considerably large n can generate a longer sequence. Simultaneously we check whether each of these numbers is prime using Miller and Rabin Primality test. Hence we obtain the two random prime numbers p and q. From these two prime numbers we generate a common signal ‘n’ for transmitter and receiver to use.

The Miller–Rabin Probabilistic Primality test was by Rabin, based on Miller’s idea. This algorithm provides a fast method of determining of primality of a number with a controllably small probability of error. Miller-Rabin primality is based on a set of equalities or an equality that hold true for prime values, and then checks whether they hold true for a number we want to test for primality.

Given an integer k, choose some integer a < k.

Let 2sd = k − 1 where d is odd.

If ad≠1 (mod k) and a2rd ≠-1(mod k) for all a ≤ r ≤ (s-1)

then n is composite and a is a witness for the compositeness. Otherwise, k may or may not be prime

Here we use modular multiplication to calculate n obtained from p,q from the Montgomery modular multiplier. The value of n and f(n) are calculated

n= p*q

f(n)= (p-1)*(q-1)

Key Generation

The third party calculates private key e and public key from the value of n and f(n) obtained from the ramdom prime numbers. The public key e, is chosen in such a way that GCD of f(n) and e is unity. . When GCD is one the number e and its multiplicative inverse is returned. Extended Euclidian Algorithm is used to calculate the GCD. It is used preferably when the two numbers are coprime.

Fig(c) Key Generation

ENCRYPTION /DECRYPTION

In Cryptography, encryption is a process by which message are transmitted in secure way that hackers cannot obtain the messages passed privately. In this mechanism a plain text is (message) is converted to a cipher text for secure transmission. It involves the generation of encryption and decryption keys using modular exponentiation method. This involves modular multiplication, modular addition and modular subtraction. The modular exponentiation is done using the Montgomery multiplication scheme. For modular multiplication we make use of the Montgomery multiplication, adjusted. The addition and Subtraction is done using a Single module of Carry look ahead Adder.

Encryption has C=Me mod n ; C=cipher text, M=message text, e=Public Key

Decryption has M= Cd mod n : d=private key

To generate the value of n and f(n), given the two prime numbers p and q, we perform modular multiplication using an adjusted form of Montgomery multiplication. For the exponentiation operation we use the actual Montgomery multiplication.

3.1 Modular Exponentiation

Modular exponentiation involves a series of modular multiplication and squaring. RSA algorithm uses exponentiation of two large numbers which is the critical step. Here we need to use high speed implementation of exponentiation as speed is critical factor in data communication. In this we implement binary exponentiation of the input message signal and the public key to get the cipher text. It consists of series of modular multiplication and followed squaring. The inputs are message M, public key e, and n. The output of modular exponentiation is the cipher text used for secure data transmission. Here we calculate number of bits in the public key and let it have k bits. Then we analyzes each bit position based on 0’s and 1’s and computation starts from LSB bit (k-1 position) to the MSB position. If the k-1 bit position of public key is 1 ,then C=M else C=1.If the next bit position k-2 is 0 then C=C*C else C= C*M.

Input : M,e,n Output: C=Me mod n

Algorithm:

If ek-1=1;C=M else C=1

For j=k-2 to 0;

If ej=0,C=C*C; else C=C*M

Let us take an example with e=21

C=M21;

The binary representation of 21 is 10101,ie k=5;

k-1 =1: C=M;

k-2=0: C=C*C=C2;

k-3=1: C= C2* C2= C4; = C4*M= C5

k-4=0: C= C5* C5 = C10

k-5=1: C=C10* C10= C20; C= C20*M= C21

Thus by squaring and multiply we are getting the exponentiation value by the Montgomery Multiplier unit. The similar mechanism is used at the receiver side during decryption.

3.2 Modular Multiplication

In modular multiplication we usually use multiply and divide and using interleaving reduction. Thus in Montgomery multiplier, we use shift and add mechanism to develop the multiplicand. This modular multiplication is also used to generate the n from the two prime numbers generated earlier and calculate gcd. The algorithm helps in fast implementation which is critical aspect of data transmission. Here we use carry look-ahead adder to make easy addition and subtraction operations.

3.3 Adder-Subtractor

In the Montgomery multiplier unit we have used the adder/subtractor circuit using carry look ahead adder. Its high speed with low power and optimised are thereby reducing circuitry for the entire rsa algorithm. The carry look ahead adder reduces the consumption of power without compromising the speed of the adder. This is achieved by generating carry simultaneously from all the bits. An n-bit carry look-ahead adder is formed from n stages, where each stage is a full adder modified by replacing its carry output line Ci by two auxiliary signals, generate (G) and propagate (P), where

Gi = XiYi (1)

Pi = Xi ^ Yi

The carry in ith stage, Ci =Gi + PiCi-1 (2)

Similarly Ci-1 = Gi-1 + Pi-1Ci-2 (3)

Substituting,equation (3) in equation (2),

Ci =Gi + PiGi-1+PiPi-1Ci-2 (4)

That is, Ci can be expressed as function of the P and G outputs of all the previous stages.

Carry look-ahead ,we have used the concept of adder-subtractor where the same circuit performs the functions of both adder and subtractor. The adder functions based on the concept of look ahead carry adder. The subtractor just uses an xor gate as an extra circuitry. The block diagram for a 1 bit adder-subtractor circuit is shown below.

Fig 4. RTL view of 1 bit adder subtractor

S1

S0

Operation

0

0

Half Adder

0

1

Half Subtractor

1

0

Full Adder

1

1

Full Subtractor

Table 1: Operating modes of the adder/subtractor

Simulation and Synthesis Results

The Random number generator, Primality test, GCD, Encryption and decryption are written in Verilog HDL and simulated in NC Launch and synthesized in Cadence RTL Compiler in 180nm . The netlist generated can be used to implement the design in IC

Table 2: Comparison with existing architecture

Reference [1]

Reference [2]

Proposed

Area (μm2)

52840

49963

47689

Power(mW)

6.012

4.6672

4.045

Delay(ns)

100.23

89.56

85.68

Conclusion

The security of this scheme depends on the difficulty of factoring n. In fact, it is easy to show that knowing d is equivalent to factoring n and that is the only way. No way of breaking RSA is known, other than finding the secret information. Thus RSA can gain more security than the other strategy because of the use of the prime numbers. The use of Montgomery multiplier helps improve the speed,which is an important criteria. The adder/subtractor based on carry lookahead adder serves to provide considerable speed without consuming much area.

Fig5. Comparison with existing architectures with respect to area, power and delay