Background Of Central Processing Unit

Published Date: 02 Nov 2017

Introduction:

What is Computer Architecture? A hardware designer must think about circuits, components, timing, functionality, ease of debugging. Computer Architect must think about high-level components, how they fit together, how they work together to deliver performance. Computer architecture represents a broad spectrum of fundamental and exciting topics that underpin computer science in general. A side from the technical challenges and sense of achievement that stem from understanding exactly how high-level programs are actually executed on devices built from simple building blocks, historical developments in computer architecture neatly capture and explain many design decisions that have shaped a landscape we now take for granted. The representation of strings in C is a great example: the null terminated ASCIIZ approach was not adopted for any real reason other than the PDP-7 computer included instructions ideal for processing strings in this form, and yet we still live with these decision years after the PDP-7 became obsolete. Seemingly frivolous anecdotes and examples like this are increasingly being consigned to history whereas from an Engineering perspective, one would like to learn and understand previous approaches so as to potentially improve in the future. International experts regularly debate tools and techniques for delivering University-level modules in computer architecture; the Workshop on Computer Architecture Education (WCAE), currently held in conjunction with the International Symposium on Computer Architecture (ISCA), is the premier research conference in this area. Computer architecture deals with the functional behavior of a computer system as viewed by a programmer for example: the size of a data type: 32 bits to an integer. We will actually do computer architecture someday and actually care about software performance someday. The ability of application programs, compilers, operating systems, to deliver performance depends critically on an understanding of the underlying computer organization. That becomes truer every year. Computer architectures become more difficult to understand every year.

History of CPU:

Many people consider the CPU (Central Processing Unit) to be the brains of the computer. This analogy is very loose because, for the most part, the CPU cannot keep data stored inside it like a brain. In contrast, it is used to process much of the information needed by the computer, just like our brain thinks and processes information and gives orders to our other body parts. Over the past few years, we have seen the CPU MHz speeds go from 100 MHz to over 2 GHz (1000 MHz = 1 GHz). This is one reason that people need to learn about a CPU. Many people would expect a 1.8 GHz Intel Pentium 4 to be much faster than a 1.4 GHz AMD Athlon because its speed is 0.4 GHz faster. In truth, not only is the Intel Pentium 4 up to three times more expensive than the AMD Athlon, it is either much slower or neck to neck in most "Real world tests", which compares the amount of times that it takes each CPU to perform a certain task. With this information, we know that we should not judge a computer by the "speed ratings". A CPU has four basic tasks that it performs. They are Fetch, Decode, Manipulate and Output. Speed rating, although not accurate, is almost always measured by MHz. The CPU speed is determined by a combination of raw MHz as well as design and other features such as the FPU of the chip.

We must remember that, like many other computer parts, the CPU is comprised of millions of logic gates embedded into it which then are used to complete a variety of different operations. The size of the CPU core, the part with the logic gates, can be as small as the size of a smaller coin. The gates are used with a clock that regulates the speed at which the CPU is fed data. The speed at which it does this is measured in Hz (amount of clock pulses in one second), MHz (about 1 million Hz) and GHz (about 1000 MHz). If there was no clock to regulate the data flow, the CPU would be unorganized and useless. The clock does a similar thing for the CPU as traffic lights do for the traffic. It makes everything organized and tells when the data should pass through, and when it should not

Below is a brief history of the CPUs, before 1993.

Processor Intel 4004 (1971): Intel’s first microprocessor. It was a breakthrough in computer technology, powering one of the first electronic calculators.

Processor Intel 8008 (1979): This is the first chip that was used in a PC. It could run at 4 MHz and supported up to1 MB of system RAM.

Processor Intel 80186 (1980): The 186 was a very popular CPU. There are two versions, an 8-bit or 16-bit.

Processor Intel 80286 (1982): This is a 16-bit processor which supports up to 16 MB of RAM. The chip ran as high as 20 MHz.

Processor Intel 80386 (1988): This was a revolutionary chip for the PC industry. It was the first 32-bit processor, which meant it could use twice as much data on each clock cycle.

Processor Intel 486 (1991): The 486 used much of the 386 architecture, but it added a math coprocessor, which made it much faster. It can go up to 120MHz.

2.1 Generation of CPU:

Pennsylvania is a University that built and designed the first of electronic computer in this world by using vacuum tube technology. Vacuum tubes were used to store the data and also perform logic operations. Generations of computers had been separate into five generation which is Vacuum Tubes, Transistors, Integrated circuit, Microprocessor and Artificial Intelligence. These technologies used to create the memories I/O units and processors.

2.1.1 First Generation (Vacuum Tubes):

Vacuum tubes spend more power with limited performance.

It is also bulky and expensive.

Electrostatic memories were used and also Mercury delay line memories.

Paper tape and Punched cards were invented to feed the data and programs to get results.

Magnetic drum or Magnetic tapes were used as secondary memory.

2.1.2 Second Generation (Transistors):

Transistors were used in place of vacuum tubes.

Size is smaller than Vacuum Tubes.

Better performance and used lesser power consumption.

Cheaper than Vacuum tube.

Magnetic disks and Magnetic tapes were used as secondary memory.

One thousand fold increase in speed.

Punched cards continued during this period also.

Increasingly used in industry business and commercial organizations for preparation of inventory control, payroll, design, engineering analysis scientific, research, planning, production and marketing.

2.1.3 Third Generation (Integrated Circuit):

ICs were used.

Small and Medium Scale Integration technology were fixed in CPU, I/O processors.

Better performance and smaller and also faster processor.

Comparatively lesser cost and introduced microprogramming.

Virtual and Cache memories were introduced (Cache memory makes the main memory appear faster than it really is. Virtual memory makes it appear larger).

2.1.4 Fourth Generation (Microprocessors):

Microprocessors were introduced as CPU– Complete processors and large section of main memory could be implemented in a single chip.

Tens of thousands of transistors can be placed in a single chip (VLSI design implemented).

CRT screen, laser and ink jet printers, scanners etc were developed.

Semiconductor memory chips were used as the main memory.

Secondary memory was composed of hard disks – Floppy disks and magnetic tapes were used for backup memory.

Parallelism, pipelining cache memory and virtual memory were applied in a better way.

LAN and WANS were developed (where desktop work stations interconnected).

Introduced C language and Unix OS and introduced Graphical User Interface.

High performance, lower cost and very compact.

Less power consumption and much increase in the speed of operation.

2.1.5 Fifth Generation (Artificial Intelligence):

Generation number beyond IV, have been used occasionally to describe some current computer system that have a dominant organizational or application driven feature.

Computers based on artificial intelligence are available.

Computers use extensive parallel processing, multiple pipelines, multiple processors etc.

Massive parallel machines and extensively distributed system connected by communication networks fall in this category.

Introduced ULSI (Ultra Large Scale Integration) technology – Intel’s Pentium 4 microprocessor contains 55 million transistors millions of components on a single IC chip.

Superscalar processors, Vector processors, SIMD processors, 32 bit micro controllers and embedded processors, Digital Signal Processors (DSP) etc have been developed.

Memory chips up to 1 GB, hard disk drives up to 180 GB and optical disks up to 27 GB are available (still the capacity is increasing).

Object oriented language like JAVA suitable for internet programming has been developed.

Storage technology advanced – large main memory and disk storage available.

Got hot pluggable features – which enable a failed component to be replaced with a new

One without the need to shut down the system, allowing the uptime of the system to be very high.

The recent development in the application of internet is the Grid technology which is still in its upcoming stage.

Quantum mechanism and nanotechnology will radically change the phase of computers.

2.2 Conclusion:

In my opinion, CPU is a very good and important technology. Every Computer must have a processor function the computer. Using a good processor for a computer can increase the computer speed and other performance faster and smoother. Other than that, a good CPU can help us save some time on waiting software or game loading. It also can increase gaming performance.

BUS

What Is a Bus? One of the misunderstood features of computers today is the bus. Today one hears about the system bus, the local bus, the SCSI bus, the ISA bus, the PCI bus, the VL-bus, and now USB. These terms are also confused with other terms for slots, ports, connectors, etc. What is a bus, then, and how do these buses, differ?

Basically, BUS is a means of getting data from one point to other point or another, for example: one device to another device, point A to point B or one device to multiple devices. Actually, capability of BUS not only can transfer data between devices, it also cans proper signaling data or information to ensure success movement of the data from one point to another. Bus need to include a means of controlling the flow of data between two devices for avoid the data loss, and ensure that both devices are ready to receive information and send information. Finally, both ends must understand the speed with which data is to be exchanged. A bus provides for all of these elements, and it includes a port definition to allow physical interfacing or connecting of two or more devices.

3.1.1 BUS Interconnection:

A Point-to-Point interconnection supports direct connection of two participants that transfer data according to some handshake protocol. It implies that a single master has a direct connection to a single slave. This is the simplest way of connecting two IP cores and the traffic is controlled by the handshaking signals. As the Point-to-point INTERCON only supports connection of a single master interface and a single slave interface, its limitations do not make it suitable for SoC multi-device inter-connection.

In a Shared Bus interconnection many masters and slaves share the bus with each other. However, only one master at a time can use the bus, and the other masters have to wait for their turn. An arbiter controlling the bus decides which master may use it at a particular moment. As a Shared bus INTERCON supports a single channel connection allowing only one master to initiate a bus cycle to a target slave through connected channel at a time, the data transfer rate of the shared bus INTERCON also turns out to be of limited nature.

Bus lines are usually classified into:

Address line: Identify the source or destination of data e.g. memory location generated by CPU. The address bus consists of 16, 20, 24, or 32 parallel signal lines. On these lines the CPU sends out the address of the memory location that is to be written to or read from.

Data line: Carry data information e.g. data from a location in memory. The data bus consists of 8, 16, or 32 parallel signal lines. The data bus lines are bidirectional.

Control line: Transmit command and timing information. The CPU sends out signals on the control bus to enable the outputs of addressed memory devices or port devices.

3.1.2 BUS Transmission:

In order to derive the highest possible throughput from a backplane bus, a careful analysis and optimization of timing parameters is essential. The maximum speed attainable at the physical level of the bus is a function of the transceiver technology, the electrical length of the bus, and the type of protocol, synchronous or asynchronous, being used. A clear understanding of the bus timing constraints lets the designer take best advantage of a given technology, such as TTL, ECL, or BTL (Backplane Transceiver Logic). Contrary to intuitive thinking, a faster transceiver will not always result in a faster bus. It can be shown through examples that greater bus transfer rates can be obtained by using specially designed bus transceivers, such as the BTL Trapezoidal, that at first glance may appear to be slower than the equivalent AS or FAST devices. These devices, in addition to improving bus bandwidth, also reduce crosstalk, ground noise, and system power requirements.

Synchronous Timing:

Now let’s consider burst data transfers on asynchronous bus. In many backplane systems, burst transfers provide the highest performance, because the overhead associated with the address cycle can be spread out over a number of data cycles. Although other types of transactions may be more complex and require more time (clock cycles), it is likely that many systems will be optimized for burst transfers. We are making some simplifying assumptions which ignore some of the penalties associated with a general-purpose synchronous bus. One of these is that the entire interface is synchronized to the bus clock. In general, each card in a backplane will be running off of its own internal high-speed clock. This results in resynchronization meta-stability problems at the master and slave interfaces, as well as a clock latency penalty of typically 50% of the clock period. We are also ignoring the return of status from the slave on each data transfer, by assuming all status can be generated before the data is clocked. This would not be true, for example, if parity had to be verified before the next data transfer could take place.

Asynchronous Timing:

Our second example is also of a burst transfer, but this time using asynchronous bus timing. In this system, the master issues a strobe along with the data, and waits for an acknowledgement from the slave before removing the current data from the bus lines. All timing is controlled by the two participants in the data transfer. The greatest advantage of an asynchronous bus protocol is its ability to adapt the speed of the bus to the speed of any two communicating boards. The most flexibility is achieved when no technology dependencies are introduced into the protocol. Unlike a synchronous system, where every board is designed with the same timing constraints in mind, a technology-independent module is designed with no assumptions about the timing of the rest of the system. . Instead, each transmitting board simply guarantees that its data is valid on the bus at least zero nanoseconds before it issues its synchronization signal, and each receiving board is responsible for ensuring that its data has been successfully latched before issuing an acknowledge. The protocol itself imposes no artificial set-up or hold time limitations.

3.1.3 BUS Architecture:

The advance Microcontroller Bus Architecture (AMBA), introduced in 1997 had its origin from the ARM processor, one of the most successful SOC processors used in industry. The AMBA bus is based on traditional bus architecture employing two levels of hierarchy. The Advanced High-performance Bus (AHB) is designed to connect embedded processors, such as an ARM processor core, to high-performance peripherals, DMA controllers, on-chip memory and interfaces. It is a high-speed, high bandwidth bus architecture that uses separate address, read and write buses. A minimum of 32 bit data operation is recommended in the standard, and data widths are extendable to 1024 bits. Concurrent multiple master/slave operations are supported. It also supports burst mode data transfers and split transactions. All transactions on the AHB bus are referenced to a single clock edge, making system level design easy to understand. The Advanced Peripheral Bus (APB) has lower performance than the AHB bus, but is optimized for minimal power consumption and has reduced interface complexity. It is designed for interfacing to slower peripheral modules.

Single BUS:

Lots of devices on one bus lead to:

Propagation delays.

Long data paths mean that co-ordination of bus use can adversely affect performance.

Bus may become bottleneck if aggregate data transfer approaches bus capacity.

Multiple-BUS:

SCSI: small computer system interface to support local disk drives, CD-ROMs, and other peripherals.

Serial: serial port to support a printer or scanner.

It is possible to connect I/O controllers directly onto the system bus. A more efficient solution is to make use of one or more expansion buses for this purpose.

Allows system to support wide variety of I/O devices.

Insulates memory-to-process traffic from I/O traffic.

3.2 Conclusion:

In my opinion, a bus is an important communication channel shared by many devices and hence rules need to be established in order for the communication to happen correctly. Design of a bus architecture involves several tradeoffs related to the width of the data bus, data transfer size, bus protocols, clocking and more. It is very useful.

Conclusion and Recommendation:

Nowadays, CPU is a very good and important technology because each computer must have a suitable processor. The processors had been separate into five generation which is Vacuum Tubes, Transistors, Integrated circuit, Microprocessor and Artificial Intelligence. Now generation, almost all computers are using the Fourth Generation (Microprocessors) processor. It is very powerful for each computer.

A BUS is a common and important pathway to connect various subsystems in a computer system. A bus consists of the connection media like connectors and wires and also a bus protocol. Buses can be parallel or serial, asynchronous or synchronous. Depending on these and other features, several bus architectures have been devised in the past. The Universal Serial Bus (USB) and IEEE 1394 are example of serial buses while the ISA and PCI buses are also examples of popular parallel buses. Those things in BUS are very important.

In my opinion, Computer architecture is way cool, but not easy. But after I learned it, I increased much knowledge about computer architecture. And I know that it is very important and helpful for my future.